cuda.core.experimental._device.DeviceProperties¶
- class cuda.core.experimental._device.DeviceProperties(*args, **kwargs)¶
A class to query various attributes of a CUDA device.
Attributes are read-only and provide information about the device.
Methods
- __init__()¶
Attributes
- property can_map_host_memory: bool¶
True if the device can map host memory into the CUDA address space, False if not.
- Type:
- property can_use_host_pointer_for_registered_mem: bool¶
True if device can access host registered memory at the same virtual address as the CPU, False if not.
- property compute_preemption_supported: bool¶
True if device supports Compute Preemption, False if not.
- property concurrent_kernels: bool¶
True if the device supports executing multiple kernels within the same context simultaneously, False if not.
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- property concurrent_managed_access: bool¶
True if device can coherently access managed memory concurrently with the CPU, False if not.
- property deferred_mapping_cuda_array_supported: bool¶
True if device supports deferred mapping CUDA arrays and CUDA mipmapped arrays, False if not.
- property direct_managed_mem_access_from_host: bool¶
True if the host can directly access managed memory on the device without migration, False if not.
- property ecc_enabled: bool¶
True if error correction is enabled on the device, False if error correction is disabled or not supported by the device.
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- property generic_compression_supported: bool¶
True if device supports compressible memory allocation via cuMemCreate, False if not.
- property global_l1_cache_supported: bool¶
True if device supports caching globals in L1 cache, False if caching globals in L1 cache is not supported by the device.
- property gpu_direct_rdma_flush_writes_options: int¶
The returned attribute shall be interpreted as a bitmask, where the individual bits are described by the CUflushGPUDirectRDMAWritesOptions enum.
- property gpu_direct_rdma_supported: bool¶
True if device supports GPUDirect RDMA APIs, False if not.
- property gpu_direct_rdma_with_cuda_vmm_supported: bool¶
True if device supports specifying the GPUDirect RDMA flag with cuMemCreate, False if not.
- property gpu_direct_rdma_writes_ordering: int¶
GPUDirect RDMA writes to the device do not need to be flushed for consumers within the scope indicated by the returned attribute.
- property gpu_overlap: bool¶
True if the device can concurrently copy memory between host and device while executing a kernel, False if not.
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- property handle_type_posix_file_descriptor_supported: bool¶
True if device supports exporting memory to a posix file descriptor with cuMemExportToShareableHandle, False if not.
- property handle_type_win32_handle_supported: bool¶
True if device supports exporting memory to a Win32 NT handle with cuMemExportToShareableHandle, False if not.
- property handle_type_win32_kmt_handle_supported: bool¶
True if device supports exporting memory to a Win32 KMT handle with cuMemExportToShareableHandle, False if not.
- property host_native_atomic_supported: bool¶
True if Link between the device and the host supports native atomic operations, False if not.
- property integrated: bool¶
True if the device is integrated with the memory subsystem, False if not.
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- property kernel_exec_timeout: bool¶
True if there is a run time limit for kernels executed on the device, False if not.
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- property l2_cache_size: int¶
Size of L2 cache in bytes, 0 if the device doesn’t have L2 cache.
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- property local_l1_cache_supported: bool¶
True if device supports caching locals in L1 cache, False if caching locals in L1 cache is not supported by the device.
- property managed_memory: bool¶
True if device supports allocating managed memory on this system, False if allocating managed memory is not supported by the device on this system.
- property max_blocks_per_multiprocessor: int¶
Maximum number of thread blocks that can reside on a multiprocessor.
- property max_pitch: int¶
Maximum pitch in bytes allowed by the memory copy functions that involve memory regions allocated through cuMemAllocPitch().
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- property max_registers_per_block: int¶
Maximum number of 32-bit registers available to a thread block.
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- property max_registers_per_multiprocessor: int¶
Maximum number of 32-bit registers available to a multiprocessor.
Maximum amount of shared memory available to a thread block in bytes.
- Type:
The maximum per block shared memory size supported on this device.
Maximum amount of shared memory available to a multiprocessor in bytes.
- property maximum_surfacecubemap_layered_layers: int¶
Maximum layers in a cubemap layered surface.
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- property maximum_texture1d_linear_width: int¶
Maximum width for a 1D texture bound to linear memory.
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- property maximum_texture2d_linear_height: int¶
Maximum height for a 2D texture bound to linear memory.
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- property maximum_texture2d_linear_pitch: int¶
Maximum pitch in bytes for a 2D texture bound to linear memory.
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- property maximum_texture2d_linear_width: int¶
Maximum width for a 2D texture bound to linear memory.
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- property maximum_texture3d_depth_alternate: int¶
Alternate maximum 3D texture depth, 0 if no alternate maximum 3D texture size is supported.
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- property maximum_texture3d_height_alternate: int¶
Alternate maximum 3D texture height, 0 if no alternate maximum 3D texture size is supported.
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- property maximum_texture3d_width_alternate: int¶
Alternate maximum 3D texture width, 0 if no alternate maximum 3D texture size is supported.
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- property maximum_texturecubemap_layered_layers: int¶
Maximum layers in a cubemap layered texture.
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- property maximum_texturecubemap_layered_width: int¶
Maximum cubemap layered texture width or height.
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- property memory_pools_supported: bool¶
True if device supports using the cuMemAllocAsync and cuMemPool family of APIs, False if not.
- property mempool_supported_handle_types: int¶
Bitmask of handle types supported with mempool based IPC.
- property multi_gpu_board_group_id: int¶
Unique identifier for a group of devices associated with the same board.
- property multicast_supported: bool¶
True if device supports switch multicast and reduction operations, False if not.
- property pageable_memory_access: bool¶
True if device supports coherently accessing pageable memory without calling cudaHostRegister on it, False if not.
- property pageable_memory_access_uses_host_page_tables: bool¶
True if device accesses pageable memory via the host’s page tables, False if not.
- property read_only_host_register_supported: bool¶
True if device supports using the cuMemHostRegister flag CU_MEMHOSTERGISTER_READ_ONLY to register memory that must be mapped as read-only to the GPU, False if not.
Amount of shared memory per block reserved by CUDA driver in bytes.
- property single_to_double_precision_perf_ratio: int¶
Ratio of single precision performance to double precision performance.
- property sparse_cuda_array_supported: bool¶
True if device supports sparse CUDA arrays and sparse CUDA mipmapped arrays, False if not.
- property texture_alignment: int¶
Alignment requirement; texture base addresses aligned to textureAlign bytes do not need an offset applied to texture fetches.
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- property texture_pitch_alignment: int¶
Pitch alignment requirement for 2D texture references bound to pitched memory.
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- property total_constant_memory: int¶
Memory available on device for __constant__ variables in a CUDA C kernel in bytes.
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- property unified_addressing: bool¶
True if the device shares a unified address space with the host, False if not.
- Type: